A tutorial. BlueSpec offers the hardware designer an exciting new way to implement a design with correct-by-construction control logic synthesis while retaining full control over the architecture and performance of the design, at a higher level than VHDL and SystemVerilog. See: BlueSpec

Presenter:

Joseph Stoy Co-founder and Principal Engineer at Bluespec Inc. -- 30 year member of the Computer Science Faculty at Oxford University in England; Fellow and Tutor at Balliol College. Published a well-known textbook on the semantics of programming languages, and other works on programming languages theory, operating systems, etc. Chaired a European Commission review committee on a project to produce a formal definition of ADA. He is a member of IFIP WG 2.8 on Functional Programming. Since the early 1980s, Stoy has been collaborating with Professor Arvind of MIT. Before joining the Bluespec technical staff, from 2000 to 2003 he participated in the team developing Bluespec technology inside Sandburst Corp.

Agenda:

9:30 coffee and snacks

10:00-12:30 workshop part 1

12:30-13:30 lunch

13:30-14:45 workshop part 2

14:45-16:00 coffee + workshop wrap up

Room:

E:1426

Contact:

Flavius Gruian

Registration:

Registration